Dr. Mrigank Sharad

Assistant Professor

About Dr. Mrigank Sharad

Assistant Professor

Brief Profile

Dr. Mrigank Sharad received his Btech and MTech from the Department of Electronics and Electrical Communication Engineering, IIT Kharagpur in 2010, with specialization in Microelectronics and VLSI Design. He received his PhD from Purdue, where he worked on VLSI devices, circuits and architectures for neuromorphic computing. As a faculty at IIT Kharagpur since 2015, Prof. Sharad has been actively involved in entrepreneurial activities and has developed several products in the area of agri-tech and ed-tech, involving the use of IOT, AI and full stack software development. He also continues to work in the area of VLSI, being actively involved in several IC design projects. Other areas of this interest involve social entrepreneurship. He has more than 70 publications in international conferences and journals.

Research Interests

Analog and Mixed Signal IC design, Signal processing applications, IOT Application Development, AI and Computer Vision, Rural Edtech, Digital Agritech, Rural Entrepreneurship Development.

Publications (Selected)

Power-Efficient Spike Sorting Scheme using Analog Spiking Neural Network Classifier by Sharad M. ACM Journal of Emerging Technologies – (Accepted/In-Press)

An Adaptive Low-Complexity Abnormality Detection Scheme for Wearable Ultrasonography by Shrivastav A., Mondal S. , Sharad M. , Bhogi K. IEEE Transactions on Circuits and Systems 001-010 (2018)

Cache Design with Domain Wall Memory. by Venkatesan R., Kozhikkottu V. , Sharad M. , Augustine C. , Raghunathan A. , Roy K. IEEE Transaction on Computers – (2016)

Hierarchical temporal memory based on spin-neurons and resistive memory for energy-efficient brain-inspired computing by Fan D., Sharad M. , Sengupta A. , Roy K. IEEE Transaction on Neural Networks – (2016)

Energy-efficient all-spin cache hierarchy using shift-based writes and multilevel storage by Venkatesan R., Sharad M. , Raghunathan A. , Roy K. ACM Transaction on Computing – (2015)

 Principal Investigator:


Design of SET Tolerant High Speed Transceiver for Chip to Chip Backplane Interconnect KCSTC

Co-Principal Investigator:

Development of Volunteer Screening Tools for Madhya Pradesh Rajya Anand Sansthan, Govt. of Madhya Pradesh (RASGMP)

A Power Management Integrated Circuit for IOT Applications SEMICONDUCTOR RESEARCH CORPORATION (SRC), USA